Publications‎ > ‎Conferences‎ > ‎

Posters, Talks, Tutorials, etc.

  1. Takahiro Yamamoto, Hiroyuki Tomiyama, Ittetsu Taniguchi, Shigeru Yamashita, Yuko Hara-Azumi, "Systematic Design of Approximate Array Multipliers with Different Accuracy," International Workshop on Highly Efficient Neural Networks Design (HENND) in conjunction with ESWEEK, Seoul, Korea, October 2017.
  2. Xiangbo Kong, Hiroyuki Tomiyama, Ittetsu Taniguchi, "A Study on Window Sizes in NLM Filter," In Proc. of Taiwan and Japan Conference on Circuits and Systems (TJCAS), p. 71, Okayama, August 2017.
  3. Seiya Shirakuni, Muneyuki Takenae, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Analysis of Hierarchical 32-Core Architectures for FPGA-based Embedded Systems," In Proc. of Taiwan and Japan Conference on Circuits and Systems (TJCAS), 1 page, Tainan, Taiwan, July-August 2016.
  4. Atsuya Shibata, Ittetsu Taniguchi, Hiroyuki Tomiyama, "An Internet-of-Things Simulation Framework with QEMU," In Proc. of Taiwan and Japan Conference on Circuits and Systems (TJCAS), 1 page, Tainan, Taiwan, July-August 2016.
  5. Hiroyuki Tomiyama, "Energy Modeling and Optimization for Delivery Quadcopters," International Forum on MPSoC for Software-defined Hardware (MPSoC), Nara, July 2016.
  6. Hiroyuki Tomiyama, "PUF-based Security Enhancement for Automotive Software Update," International Forum on MPSoC for Software-defined Hardware (MPSoC), Ventura, CA, USA, July 2015.
  7. Hiroyuki Tomiyama, "SMYLE OpenCL: A Parallel Programming Framework for Embedded Manycore SoCs," SNU-ESRC and Samsung-SATTI Joint Workshop, Seoul/Suwon, Korea, Sep. 2013.
  8. Hiroyuki Tomiyama, "Simulation of Many-core NoCs with QEMU and SystemC," International Forum on Embedded MPSoC and Multicore (MPSoC), Otsu, July 2013.
  9. Hiroyuki Tomiyama, "OpenCL Compiler and Runtime Library for Embedded Manycore SoCs," International Forum on Embedded MPSoC and Multicore (MPSoC), Quebec, Canada, July 2012.
  10. Nakajima Keita, Takuji Hieda, Ittetsu Taniguchi and Hiroyuki Tomiyama, "An NoC Virtual Platform Based on QEMU and SystemC," Poster presentation at Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP)  in conjunction with Design Automation and Test in Europe (DATE), Dresden, Germany, March 2012.
  11. Takuji Hieda, Naoki Nishiyama, Ittetsu Taniguchi, Hiroyuki Tomiyama and Koji Inoue, "An OpenCL Implementation Supporting Task Parallel Execution on Embedded Many-core Architecture," Poster presentation at Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP) in conjunction with Design Automation and Test in Europe (DATE), Dresden, Germany, March 2012.
  12. Hiroyuki Tomiyama, "Challenges of Programming Embedded Many-Core SoCs with OpenCL," International Forum on Embedded MPSoC and Multicore (MPSoC), Beaune, France, July 2011.
  13. Hiroyuki Tomiyama, "Efficient Utilization of Scratch-Pad Memory in Preemptive Multi-Task Systems," Workshop on Compiler-Assisted System-On-Chip Assembly (CASA)in conjunction with Embedded Systems Week (ESWEEK), Scottsdale, AZ, USA, Oct. 2010.
  14. H. Tomiyama, "Real-Time Operating Systems for MPSoC," 9th International Forum on Embedded MPSoC and Multicore (MPSoC), Savannah, GA, USA, Aug. 2009.
  15. Ahmed Amine Jerraya, Wayne Wolf, Damir Jamsek, Hiroyuki Tomiyama, and Fabien Clermidy, "Software Development and Programming of Multicore LSI," Full-Day Tutorial, Asia and South Pacific Design Automation Conference (ASP-DAC), Yokoyama, Japan, Jan. 2009.
  16. Y. Hara, H. Tomiyama, S. Honda, and H. Takada, "The CHStone Benchmark Suite for Practical C-based High-Level Synthesis," ECSI and USB Workshop on High Level Synthesis: Next Step to Efficient ESL Design in conjunction with Asia and South Pacific Design Automation Conference (ASP-DAC) and Electronic Design and Solution Fiair (EDSFair), Yokohama, Japan, Jan. 2009.
  17. Y. Hara, H. Tomiyama, S. Honda, and H. Takada, "The CHStone Benchmark Suite for Practical C-based High-Level Synthesis ," Poster presentation at ECSI Workshop on High-Level Synthesis: Back to the Future in conjunction with Design Automation Conference (DAC), Anaheim, CA, USA, June 2008.
  18. H. Tomiyama, "RTOS-Centric Cosimulation of MPSoC," 7th International Forum on Application-Specific Multi-Processor SoC (MPSoC), Awaji Island, June 2007.
  19. M. Yamamoto, H. Tomiyama, S. Honda, N. Kaneko, K. Mase, N. Kawaguchi, H. Takada, and K. Agusa, "An Analysis of Learner's Activities in Embedded Software Programming Practices ," In Proceedings of 19th Conference on Software Engineering Education and Training Workshops (CSEETW), p. 9, Hawaii, USA, Apr. 2006.
  20. H. Tomiyama, "System-Level Design Tools and RTOS for Multiprocessor SoC," 4th International Forum on Application-Specific Multi-Processor SoC (MPSoC), Saint-Maximin la Sainte Baume, France, July 2004.
  21. A. Inoue, H. Tomiyama, and H. Yasuura, "A Retargetable Compilation for Embedded System Design Considering Variable Precisions ," 4th International Workshop on Software and Compilers for Embedded Systems (SCOPES), St. Goar, Germany, Sep. 1999.
  22. A. Inoue, H. Tomiyama, F. N. Eko, H. Kanbara, H. Date, and H. Yasuura, "A Framework for Application Specific System Design ," In Proc. of 20th International Conference on Software Engineering (ICSE), posters and research demonstrations, vol. 2, pp. 109-114, Kyoto, Japan, Apr. 1998.
  23. A. Inoue, H. Tomiyama, T. Shimizu, H. Kanbara, and H. Yasuura, "An Embedded Software Programming Language for Application Specific Datapath Width Processors ," Poster presentation at (not included in the proceedings of) 6th International Workshop on Hardware/Sotware Codesign (Codes/CASHE), Seattle, USA, Mar. 1998.