Journals and Magazines

Journals

• 1. Yuto Miura, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "Timing Issues on Power Side-Channel Leakage of Advanced Encryption Standard Circuits Designed by High-Level Synthesis," International Journal of Reconfigurable and Embedded Systems, IAES, vol. 13, no. 3, pp. 616-624, November 2024. [Download]. 

  2. Mao Nishira, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "An Integer Programming Approach to Multi-Trip Routing of Delivery Drones at Load-Dependent Flight Speed," Drones and Autonomous Vehicles, SCIEPublish, vol. 1, no. 3, September 2024. [Download]

  3. Kaito Mori, Mao Nishira, Hiroki Nishikawa, Hiroyuki Tomiyama, "Exact and Heuristic Approaches to Surveillance Routing with a Minimum Number of Drones," Drones and Autonomous Vehicles, SCIEPublish, vol. 1, no. 2, June 2024. [Download]

  4. Juncheng Wang, Xiangbo Kong, Hiroki Nishikawa, Qiuyou Lian, Hiroyuki Tomiyama, "Dynamic Point-Pixel Feature Alignment for Multimodal 3D Object Detection," IEEE Internet of Things Journal, vol. 11, no. 7, pp. 11327-11340, April 2024. [Download]

  5. Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita, "A Deep Reinforcement Learning Approach to Droplet Routing for Erroneous Digital Microfluidic Biochips," Sensors, MDPI, vol. 23, no. 21, November 2023. [Download]

  6. Takumi Mizuno, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "Empirical Analysis of Power Side-Channel Leakage of High-Level Synthesis Designed AES Circuits," International Journal of Reconfigurable and Embedded Systems, IAES, vol. 12, no. 3, pp. 305-319, November 2023. [Download]

  7. Mao Nishira, Satoshi Ito, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "An Integer Programming Based Approach to Delivery Drone Routing under Load-Dependent Flight Speed," Drones, MDPI, vol. 7, no. 5, May 2023. [Download]

  8. Hengyi Li, Zhichen Wang, Xuebin Yue, Wenwen Wang, Hiroyuki Tomiyama, Lin Meng, "An Architecture-level Analysis on Deep Learning Models for Low-Impact Computations," Artificial Intelligence Review, Springer, vol. 56, no. 3, pp. 1971-2010, March 2023. [Download]

  9. Yilin Zhao, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "Side Channel Power Analysis Resistance Evaluation of Masked Adders on FPGA," International Journal of Reconfigurable and Embedded Systems, IAES, vol. 12, no. 1, pp. 97-112, March 2023. [Download]

  10. Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "Fast and High-quality Monocular Depth Estimation with Optical Flow for Autonomous Drones," Drones, MDPI, vol. 7, no. 2, February 2023. [Download]

  11. Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita, Sudip Roy, "Shape-Dependent Velocity based Droplet Routing on MEDA Biochips," IEEE Access, vol. 10, pp. 122423-122430, November 2022. [Download]

  12. Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, "ILP-based and Heuristic Scheduling Techniques for Variable-Cycle Approximate Functional Units in High-Level Synthesis," Computers, MDPI, vol. 11, no. 10, article 146, October 2022. [Download]

  13. Hengyi Li, Xuebin Yue, Zhichen Wang, Zhilei Chai, Wenwen Wang, Hiroyuki Tomiyama, Lin Meng, "Optimizing the Deep Neural Networks by Layer-wise Refined Pruning and the Acceleration on FPGA," Computational Intelligence and Neuroscience, Hindawi, vol. 2022, article 8039281, June 2022. [Download]

  14. Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita, "Minimization of MEDA Biochip-size in Droplet Routing," Biosensors, MDPI, vol. 12, no. 5, article 277, May 2022. [Download]

  15. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Mouldable Fork-Join Task Scheduling Techniques with Inter and Intra-Task Communications," International Journal of Embedded Systems, Inderscience Publishers, vol. 15, no. 1, pp. 69-81, April 2022. [Download]

  16. Tomoyasu Shimada, Hiroki Nishikawa, Xiangbo Kong and Hiroyuki Tomiyama, "Pix2Pix-based Monocular Depth Estimation for Drones with Optical Flow on AirSim," Sensors, MDPI, vol. 22, no. 6, March 2022. [Download]

  17. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores," IEICE Transactions on Fundamentals, vol. E105-A, no. 3, pp. 540-548, March 2022. [Download]

  18. Satoshi Ito, Keishi Akaiwa, Yusuke Funabashi, Hiroki Nishikawa, Xiangbo Kong, Ittetsu Taniguchi and Hiroyuki Tomiyama, "Load and Wind Aware Routing of Delivery Drones," Drones, MDPI, vol. 6, no. 2, February 2022. [Download]

  19. Zelin Meng, Lin Meng, Hiroyuki Tomiyama, "Feature Classification-Based Inclination Measurement for Industrial Assembly Platform," Wireless Communications and Mobile Computing, Hindawi, vol. 2022, article 5911031, February 2022. [Download]

  20. Hengyi Li, Xuebin Yue, Zhichen Wang, Wenwen Wang, Hiroyuki Tomiyama, Lin Meng, "A Survey of Convolutional Neural Networks - From Software to Hardware and the Applications in Measurement," Measurement: Sensors, Elsevier, vol. 18, article 100080, December 2021. [Download]

  21. Takuma Hikida, Hiroki Nishikawa, Hiroyuki Tomiyama, "Heuristic Algorithms for Dynamic Scheduling of Moldable Tasks in Multicore Embedded Systems," International Journal of Reconfigurable and Embedded Systems, IAES, vol. 10, no. 3, pp. 157-167, November 2021. [Download]

  22. Satoshi Ito, Hiroki Nishikawa, Xiangbo Kong, Yusuke Funabashi, Atsuya Shibata, Shunsuke Negoro, Ittetsu Taniguchi and Hiroyuki Tomiyama, "Energy-aware Routing of Delivery Drones under Windy Conditions," IPSJ Transactions on System LSI Design Methodology, vol. 14, pp. 30-39, August 2021. [Download]

  23. Zelin Meng, Lin Meng, Hiroyuki Tomiyama, "Pneumonia Diagnosis on Chest X-Rays with Machine Learning," Procedia Computer Science, Elsevier, vol. 187, pp. 42-51, 2021. [Download]

  24. Xiangbo Kong, Takeshi Kumaki, Lin Meng, Hiroyuki Tomiyama, "A Skeleton Analysis Based Fall Detection Method Using ToF Camera," Procedia Computer Science, Elsevier, vol. 187, pp. 252-257, 2021. [Download]

  25. Satoshi Ito, Shunsuke Negoro, Xiangbo Kong, Ittetsu Taniguchi, Hiroyuki Tomiyama, "A Methodology for Measuring Flight Speed of Drones in Indoor Environments," Procedia Computer Science, Elsevier, vol. 187, pp. 322-328, 2021. [Download]

  26. Kenta Shirane, Takahiro Yamamoto, Hiroyuki Tomiyama, "A Design Methodology for Approximate Multipliers in Convolutional Neural Networks: A Case of MNIST," International Journal of Reconfigurable and Embedded Systems, IAES, vol. 10, no. 1, pp. 1-10, March 2021. [Download]

  27. Zelin Meng, Lin Meng, Hiroyuki Tomiyama, "Motion Estimation Based Inclination Measurement of the Assembly Platform," International Journal of Advanced Mechatronic Systems, Inderscience Publishers, vol. 8, no. 4, pp. 155-165, January 2021. [Download]

  28. Xiangbo Kong, Lin Meng, Hiroyuki Tomiyama, "A Self-Learning Fall Detection System for Elderly Persons Using Depth Camera," International Journal of Advanced Mechatronic Systems, Inderscience Publishers, vol. 8, no. 1, pp. 16-25, September 2020. [Download]

  29. Hiroki Nishikawa, Kenta Shirane, Ryohei Nozaki, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Function-Level Module Sharing Techniques in High-Level Synthesis," ETRI Journal, vol. 42, no. 4, pp. 527-533, August 2020. [Download]

  30. Yusuke Funabashi, Atsuya Shibata, Shunsuke Negoro, Ittetsu Taniguchi and Hiroyuki Tomiyama, "A Dynamic Programming Algorithm for Energy-aware Routing of Delivery Drones," IPSJ Transactions on System LSI Design Methodology, vol. 13, pp. 65-68, August 2020. [Download]

  31. Yuxi Chen, Xiangbo Kong, Lin Meng and Hiroyuki Tomiyama, "An Edge Computing Based Fall Detection System for Elderly Persons," Procedia Computer Science, Elsevier, vol. 174, pp. 9-14, July 2020. [Download]

  32. Zelin Meng, Lin Meng and Hiroyuki Tomiyama, "Camera Motion Estimation Algorithm for IoT Devices based on Optimized Feature Tracking Method," Procedia Computer Science, Elsevier, vol. 174, pp. 22-26, July 2020. [Download]

  33. Xiangbo Kong, Zhe Zhang, Lin Meng and Hiroyuki Tomiyama, "Machine Learning Based Features Matching for Fatigue Crack Detection," Procedia Computer Science, Elsevier, vol. 174, pp. 101-105, July 2020. [Download]

  34. Lehan Chen, Bing Lyu, Hiroyuki Tomiyama and Lin Meng, "A Method of Japanese Ancient Text Recognition by Deep Learning," Procedia Computer Science, Elsevier, vol. 174, pp. 276-279, July 2020. [Download]

  35. Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama, "A Branch-and-Bound Approach to Scheduling of Data-Parallel Tasks on Multicore Architectures," International Journal of Embedded Systems, Inderscience Publishers, vol. 12, no. 1, pp. 125-135, February 2020. [Download]

  36. Yaqiang Zhang, Lin Meng, Xiao Xue, Zhangbing Zhou and Hiroyuki Tomiyama, "QoE-Constrained Concurrent Request Optimization Through Collaboration of Edge Servers," IEEE Internet of Things Journal, vol. 6, no. 6, pp. 9951-9962, December 2019. [Download]

  37. Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama, "ILP-based Scheduling for Malleable Fork-Join Tasks," ACM SIGBED Review, vol. 16, no. 3, pp. 21-26, October 2019. [Download]

  38. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi and Hiroyuki Tomiyama, "Energy-Aware Scheduling of Malleable Fork-Join Tasks under a Deadline Constraint on Heterogeneous Multicores," ACM SIGBED Review, vol. 16, no. 3, pp. 57-62, October 2019. [Download]

  39. Xiangbo Kong, Lehan Chen, Zhichen Wang, Yuxi Chen, Lin Meng, Hiroyuki Tomiyama, "Robust Self-Adaptation Fall-Detection System based on Camera Height," Sensors, MDPI, vol. 19, no. 17, September 2019. [Download]

  40. Kana Shimada, Ittetsu Taniguchi and Hiroyuki Tomiyama, "Communication-Aware Scheduling of Data-Parallel Tasks on Multicore Architectures," IPSJ Transactions on System LSI Design Methodology, vol. 12, pp. 65-73, August 2019. [Download]

  41. Yang Liu, Lin Meng and Hiroyuki Tomiyama, "A Genetic Algorithm for Scheduling of Data-Parallel Tasks on Multicore Architectures," IPSJ Transactions on System LSI Design Methodology, vol. 12, pp. 74-77, August 2019. [Download]

  42. Hiroki Nishikawa, Kana Shimada, Ittetsu Taniguchi and Hiroyuki Tomiyama, "A Constraint Programming Approach to Scheduling of Malleable Tasks," International Journal of Networking and Computing, vol. 9, no. 2, pp. 131-146, July 2019. [Download]

  43. Seiya Shirakuni, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Design and Evaluation of Asymmetric and Symmetric 32-core Architectures on FPGA," IPSJ Transactions on System LSI Design Methodology, vol. 12, pp. 42-45, February 2019. [Download]

  44. Takafumi Miyazaki, Shunsuke Takai, Ittetsu Taniguchi, Hiroyuki Tomiyama, "An OpenCL-based Software Framework for a Heterogeneous Multicore Architecture on Zynq-7000 SoC," IPSJ Transactions on System LSI Design Methodology, vol. 12, pp. 46-49, February 2019. [Download]

  45. Xiangbo Kong, Zelin Meng, Lin Meng and Hiroyuki Tomiyama, "Three-States-Transition Method for Fall Detection Algorithm Using Depth Image," Journal of Robotics and Mechatronics, vol. 31, no. 1, pp. 88-94, February 2019. [Download]

  46. Xiangbo Kong, Zelin Meng, Naoto Nojiri, Yuji Iwahori, Lin Meng and Hiroyuki Tomiyama, "A HOG-SVM Based Fall Detection IoT System for Elderly Persons Using Deep Sensor," Procedia Computer Science, Elsevier, vol. 147, pp. 276-282, February 2019. [Download]

  47. Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi, "A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1496-1499, July 2017. [Download]

  48. Yining Xu, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Static Mapping of Parallelizable Tasks under Deadline Constraints," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1500-1502, July 2017. [Download]

  49. Kana Shimada, Shogo Kitano, Ittetsu Taniguchi, Hiroyuki Tomiyama, "ILP-based Scheduling for Parallelizable Tasks," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1503-1505, July 2017. [Download]

  50. Yang Liu, Lin Meng, Ittetsu Taniguchi, and Hiroyuki Tomiyama, "A Dual-Mode Scheduling Approach for Task Graphs with Data Parallelism," International Journal of Embedded Systems, Inderscience Publishers, vol. 9, no. 2, pp. 147-156, April 2017. [Download]

  51. Yining Xu, Yang Liu, Junya Kaida, Ittetsu Taniguchi, and Hiroyuki Tomiyama, "Static Mapping of Multiple Parallel Applications on Non-Hierarchical Manycore Embedded Systems," IEICE Trans. on Fundamentals, vol. E99-A, no. 7, pp. 1417-1419, July 2016. [Download]

  52. Gang Zeng, Yutaka Matsubara, Hiroyuki Tomiyama, and Hiroaki Takada, "Energy-Aware Task Migration for Multiprocessor Real-Time Systems," Future Generation Computer Systems, Elsevier, vol. 56, pp. 220-228, March 2016. [Download]

  53. Tran Van Dung, Ittetsu Taniguchi, Takuji Hieda and Hiroyuki Tomiyama, "Function-Level Profiling for Embedded Software with QEMU," International Journal of Embedded Systems, Inderscience Publishers, vol. 7, no. 2, pp. 170-179, June 2015. [Download]

  54. Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama and Hiroaki Takada "An Integrated Framework for Energy Optimization of Embedded Real-Time Applications," IEICE Trans. on Fundamentals, vol. E97-A, no. 12, pp. 2477-2487, Dec. 2014. [Download]

  55. Ittetsu Taniguchi, Junya Kaida, Takuji Hieda, Yuko Hara-Azumi, and Hiroyuki Tomiyama, "Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-core SoCs," IEICE Trans. on Information and Systems, vol. E97-D, no. 11, pp. 2827-2834, Nov. 2014. [Download]

  56. Yang Liu, Lin Meng, Ittetsu Taniguchi and Hiroyuki Tomiyama, "Novel List Scheduling Strategies for Data Parallelism Task Graphs," International Journal of Networking and Computing, vol. 4, no. 2, pp. 279-290, July 2014. [Download]

  57. Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada, "SEEDS: System-level Design Environment for Embedded Systems (in Japanese)," IEICE Transactions on Information and Systems, vol. J97-D, no. 3, pp. 450-460, March 2014.

  58. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda and Hiroaki Takada, "Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs," IPSJ Transactions on System LSI Design Methodology, vol. 7, pp. 37-45, Feb. 2014. [Download]

  59. Ittetsu Taniguchi, Kohei Aoki, Hiroyuki Tomiyama, Praveen Raghavan, Francky Catthoor, Masahiro Fukui, "Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path," IEICE Transactions on Fundamentals, vol. E97-A, no. 2, pp. 606-615, Feb. 2014. [Download]

  60. Junya Kaida, Yuko Hara-Azumi, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, and Koji Inoue, "Static Mapping of Multiple Data-Parallel Applications on Embedded Many-core SoCs," IEICE Transactions on Information and Systems, vol. E96-D, no. 10, pp. 2268-2271, Oct. 2013. [Download]

  61. Krzysztof Jozwik, Shinya Honda, Masato Edahiro, Hiroyuki Tomiyama and Hiroaki Takada, "Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs," International Journal of Reconfigurable Computing, vol. 2013, Article ID 789134, 40 pages, 2013. [Download]

  62. Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda and Hiroaki Takada, "Quantitative Evaluation of Resource Sharing in High-Level Synthesis Using Realistic Benchmarks," IPSJ Transactions on System LSI Design Methodology, vol. 6, pp. 122-126, Aug. 2013. [Download]

  63. Keita Nakajima, Shuto Kurebayashi, Yusuke Fukutsuka, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, and Hiroaki Takada, "Naxim: A Fast and Retargetable Network-on-Chip Simulator with QEMU and SystemC," International Journal of Networking and Computing, vol. 3, no. 2, pp. 217-227, July 2013. [Download]

  64. Hirofumi Kawauchi, Ittetsu Taniguchi, Hiroyuki Tomiyama, and Masahiro Fukui, "Accurate and Efficient RTL Power Estimation based on Power Contour Model," Electrical Engineering in Japan, vol. 182, no. 3, pp. 48-56, Feb. 2013. [Download]

  65. Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda and Hiroaki Takada, "Comparison of Preemption Schemes for Partially Reconfigurable FPGAs," IEEE Embedded Systems Letters, vol. 4, no. 2, pp. 45-48, June 2012. [Download]

  66. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama and Hiroaki Takada, "A Fast Performance Estimation Framework for System-Level Design Space Exploration," IPSJ Transactions on System LSI Design Methodology, vol. 5, pp. 44-54, Feb. 2012. [Download]

  67. Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, "A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs," IEICE Transactions on Information and Systems, vol. E95-D, no. 2, pp. 345-353, Feb. 2012. [Download]

  68. Tomohiro Tatematsu, Hideki Takase, Gang Zeng, Hirotaka Kawashima, Hiroyuki Tomiyama, Hiroaki Takada, "Execution Trace Based Checkpoint Extraction for Intra-Task DVFS in Embedded Systems (in Japanese)," IPSJ Journal, vol. 52, no. 12, pp. 3729-3744, Dec. 2011. [Download]

  69. Hirofumi Kawauchi, Ittetsu Taniguchi, Hiroyuki Tomiyama, and Masahiro Fukui, "An Accurate and Efficient RTL Power Estimation based on Power Contour Model (in Japanese)," IEEJ Transactions on Electronics, Information and Systems, vol. 131, no. 11, pp.1907-1914, Nov. 2011. [Download]

  70. Hideki Takase, Hiroyuki Tomiyama and Hiroaki Takada, "Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems," IEICE Transactions on Fundamentals, vol. E94-A, no. 10, pp. 1954-1964, Oct. 2011. [Download]

  71. Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada, "SystemBuilder-MP: System-Level Multiprocessor Design Toolset (in Japanese)," IEICE Transactions on Information and Systems, vol. J94-D, no. 4, pp. 657-670, Apr. 2011. [Download]

  72. Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama and Hiroaki Takada, "Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design," IEICE Transactions on Fundamentals, vol. E93-A, no. 12, pp. 2509-2516, Dec. 2010. [Download]

  73. Takuya Azumi, Takashi Furukawa, Hiroshi Aiba, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada, "Open Source Simulator for Embedded System Extended Multiprocessor (in Japanese)," JSSST Computer Software, vol. 27, no. 4, pp. 24-42, Nov. 2010. [Download]

  74. Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, and Hiroaki Takada, "Static Task Scheduling Algorithms Based on Greedy Heuristics for Battery-Powered DVS Systems," IEICE Transactions on Information and Systems, vol. E93-D, no. 10, pp. 2737-2746, Oct. 2010. [Download]

  75. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama and Hiroaki Takada, "Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation," IPSJ Transactions on System LSI Design Methodology, vol. 3, pp. 179-193, Aug. 2010. [Download]

  76. Y. Hara, H. Tomiyama, S. Honda, and H. Takada, "Partitioning of Behavioral Descriptions Exploiting Function-Level Parallelism," IEICE Trans. Fundamentals, vol. E93-A, no. 2, pp. 488-499, Feb. 2010. [Download]

  77. Y. Hara, H. Tomiyama, S. Honda, and H. Takada, "Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-Based High-Level Synthesis," IPSJ Journal of Information Processing (JIP), vol. 17, pp. 242-254, Oct. 2009. [Download]

  78. G. Zeng, H. Tomiyama, and H. Takada, "A Generalized Framework for Energy Savings in Hard Real-Time Embedded Systems," IPSJ Trans. System LSI Design Methodology (TSLDM), vol. 2, pp.167-179, Aug. 2009. [Download]

  79. H. Takase, H. Tomiyama, and H. Takada, "Partitioning and Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems," IPSJ Trans. System LSI Design Methodology (TSLDM), vol. 2, pp.180-188, Aug. 2009. [Download]

  80. S. Ding, H. Tomiyama, and H. Takada, "Effective Scheduling Algorithms for I/O Blocking with a Multi-Frame Task Model," IEICE Trans. Information and Systems, vol. E92-D, no. 7, pp. 1412-1420, July 2009. [Download]

  81. T. Yokoyama, K. Imai, G. Zeng, H. Tomiyama, H. Takada, and S. Yuen, "Energy Efficient Functional Programing on DVS Systems by Varying Evaluation Strategies (in Japanese)," IPSJ Trans. Programming, vol. 2, no. 2, pp. 54-69, Mar. 2009. [Download]

  82. H. Takase, H. Tomiyama, G. Zeng, and H. Takada, "Energy Efficiency of Scratch-Pad Memory in Deep Submicron Domains: An Empirical Study," IEICE Electronics Express, vol. 5, no. 23, pp. 1010-1016, Dec. 2008. [Download]

  83. M. Nishimura, N. Ishiura, Y. Ishimori, H. Kanbara, and H. Tomiyama, "High-Level Synthesis of Software Function Calls," IEICE Trans. Fundamentals, vol. E91-A, no. 12, pp. 3556-3558, Dec. 2008. [Download]

  84. Y. Matsubara, S. Honda, H. Tomiyama, and H. Takada, "A Flexible Scheduling Framework for Integration of Real-Time Applications (in Japanese)," IPSJ Journal, vol. 49, no. 10, pp. 3508-3519, Oct. 2008. [Download]

  85. G. Zeng, H. Tomiyama, and H. Takada, "Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services," IPSJ Trans. System LSI Design Methodology (TSLDM), pp. 48-57, vol. 1, Aug. 2008. [Download]

  86. S. Shibata, S. Honda, Y. Hara, H. Tomiyama, and H. Takada, "Embedded System Covalidation with RTOS Model and FPGA," IPSJ Trans. System LSI Design Methodology (TSLDM), pp. 126-130, vol. 1, Aug. 2008. [Download]

  87. S. Ding, H. Tomiyama, and H. Takada, "An Effective GA-Based Scheduling Algorithm for FlexRay Systems," IEICE Trans. Information and Systems, vol. E91-D, no. 8, pp. 2115-2123, Aug. 2008. [Download]

  88. Y. Hara, H. Tomiyama, S. Honda, H. Takada, and K. Ishii, "Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis," IEICE Trans. Fundamentals, vol. E90-A, no. 12, pp. 2853-2862, Dec. 2007. [Download]

  89. Y. Hara, H. Tomiyama, S. Honda, and H. Takada, "Function Call Optimization for Efficient Behavioral Synthesis," IEICE Trans. Fundamentals, vol. E90-A, no. 9, pp. 2032-2036, Sep. 2007. [Download]

  90. Y. Matsubara, S. Honda, H. Tomiyama, and H. Takada, "Real-Time Scheduling Algorithm for Temporal Protection (in Japanese)," IPSJ Trans. Advanced Computing Systems, vol. 48, no. SIG8 (ACS18), pp. 192-202, May 2007. [Download]

  91. N. Murakami, H. Tomiyama, and H. Takada, "A Static Scheduling Method for Distributed Automotive Control Systems (in Japanese)," IPSJ Trans. Advanced Computing Systems, vol. 48, no. SIG8 (ACS18), pp. 203-215, May 2007. [Download]

  92. M. Yamamoto, S. Honda, H. Takada, K. Agusa, H. Tomiyama, K. Mase, N. Kawaguchi, and N. Kaneko, "Practice and Analysis of an Extension Course for Training Trainers of Embedded Software," ACM SIGBED Review, vol. 4, no. 1, pp. 73-81, Jan. 2007. [Download]

  93. M. Yamamoto, K. Agusa, K. Mase, H. Takada, N. Kawaguchi, H. Tomiyama, S. Honda, and N. Kaneko, "NEXCESS: Education for Embedded Software Specialists - Enhance Worker's Skill (in Japanese)," Journal of JSEE, vol. 54, no.5, pp. 49-54, Sep. 2006. [Download]

  94. M. Yamamoto, N. Kawaguchi, K. Agusa, K. Mase, H. Takada, H. Tomiyama, S. Honda, and N. Kaneko, "Remedial Education of Embedded Software Specialists for Working People (in Japanese)," IEEJ Trans. Fundamentals and Materials, vol. 126-A, no. 7, pp. 563-569, July 2006. [Download]

  95. H. Miyamoto, S. Iiyama, H. Tomiyama, H. Takada, and H. Nakashima, "A Search Algorithm of Worst-Case Cache Flush Timings Using Dynamic Programming (in Japanese)," IPSJ Trans. Advanced Computing Systems, vol. 46, no. SIG 16 (ACS12), pp. 85-94, Dec. 2005. [Download]

  96. M. Yamamoto, H. Tomiyama, H. Takada, K. Agusa, K. Mase, N. Kawaguchi, S. Honda, and N. Kaneko, "NEXCESS: Nagoya University Extension Courses for Embedded Software Specialists," ACM SIGBED Review, vol. 2, no. 4, pp. 20-24, Oct. 2005. [Download]

  97. H. Tomiyama, S. Chikada, S. Honda, and H. Takada, "An RTOS-Based Design and Validation Methodology for Embedded Systems," IEICE Trans. Information and Systems, vol. E88-D, no. 9, pp. 2205-2208, Sep. 2005. [Download]

  98. S. Honda, H. Tomiyama, and H. Takada, "SystemBuilder: A System Level Design Environment (in Japanese)," IEICE Trans. Information and Systems, vol. J88-D-I, no. 2, pp. 163-174, Feb. 2005. [Download]

  99. S. Honda, T. Wakabayashi, H. Tomiyama, and H. Takada, "RTOS-Centric Cosimulator for Embedded System Design," IEICE Trans. Fundamentals, vol. E87-A, no. 12, pp. 3030-3035, Dec. 2004. [Download]

  100. S. Iiyama, H. Tomiyama, H. Takada, M. Kido, and I. Hosotani, "Response Time Analysis for Grouped CAN Messages with Offsets (in Japanese)," IPSJ Trans. Advanced Computing Systems, vol. 45, no. SIG 11 (ACS 7), pp. 455-464, Oct. 2004. [Download]

  101. H. Tomiyama, "Impacts of Compiler Optimizations on Address Bus Energy: An Empirical Study," IEICE Trans. Fundamentals, vol. E87-A, no. 10, pp. 2815-2820, Oct. 2004. [Download]

  102. H. Tomiyama and N. Dutt, "ILP-Based Program Path Analysis for Bounding Worst-Case Inter-Task Cache Conflicts," IEICE Trans. Information and Systems, vol. E87-D, no. 6, pp. 1582-1587, June 2004. [Download]

  103. H. Tomiyama, H. Takada, and N. Dutt, "Memory Data Organization for Low-Energy Address Buses," IEICE Trans. Electronics, vol. E87-C, no. 4, pp. 606-612, Apr. 2004. [Download]

  104. P. Mishra, N. Dutt, and H. Tomiyama, "Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications," Kluwer Journal on Design Automation for Embedded Systems, vol. 8, no. 2-3, pp. 249-265, June-September, 2003.[Download]

  105. H. Tomiyama and H. Yasuura, "Module Selection Using Manufacturing Information," IEICE Trans. Fundamentals, vol. E81-A, no. 12, pp. 2576-2584, Dec. 1998. [Download]

  106. A. Inoue, H. Tomiyama, T. Okuma, H. Kanbara, and H. Yasuura, "Language and Compiler for Optimizing Datapath Widths of Embedded Systems," IEICE Trans. Fundamentals, vol. E81-A, no. 12, pp. 2595-2604, Dec. 1998. [Download]

  107. H. Tomiyama, T. Ishihara, A. Inoue, and H. Yasuura, "Instruction Scheduling to Reduce Switching Activity of Off-Chip Buses for Low-Power Systems with Caches," IEICE Trans. Fundamentals, vol. E81-A, no. 12, pp. 2621-2629, Dec. 1998. [Download]

  108. H. Yasuura, H. Tomiyama, A. Inoue, and F. N. Eko, "Embedded System Design Using Soft-Core Processor and Valen-C," IIS Journal of Information Science and Engineering, vol. 14, no. 3, pp. 587-603, Sep. 1998.

  109. F. N. Eko, A. Inoue, H. Tomiyama, and H. Yasuura, "Soft-Core Processor Architecture for Embedded System Design," IEICE Trans. Electronics, vol. E81-C, no. 9, 1416-1423, Sep. 1998. [Download]

  110. B. Shackleford, M. Yasuda, E. Okushi, H. Koizumi, H. Tomiyama, A. Inoue, and H. Yasuura, "Embedded System Cost Optimization via Data Path Width Adjustment," IEICE Trans. Information and Systems, vol. E80-D, no. 10, pp. 974-981, Oct. 1997. [Download]

  111. H. Tomiyama and H. Yasuura, "Code Placement Techniques for Cache Miss Rate Reduction," ACM Trans. Design Automation of Electronic Systems (TODAES), vol. 2, no. 4, pp. 410-429, Oct. 1997. [Download]

  112. B. Shackleford, M. Yasuda, E. Okushi, H. Koizumi, H. Tomiyama, and H. Yasuura, "Satsuki: An Integrated Processor Synthesis and Compiler Generation System," IEICE Trans. Information and Systems, vol. E79-D, no. 10, pp. 1373-1381, Oct. 1996. [Download]

Magazines and Technical Reports

• 1. H. Tomiyama, "Hardware Technology for Embedded Systems (in Japanese)," Systems, Control and Information, no. 51, vol. 9, pp. 380-387, Sep. 2007.

  2. M. Yamamoto, K. Agusa, K. Mase, H. Takada, N. Kawaguchi, H. Tomiyama, S. Honda, and N. Kaneko, "Practice and Analysis of Extension Courses for Embedded Software Specialists in a University (in Japanese)," SEC journal, no. 1, vol. 4, pp. 36-45, Nov. 2005.

  3. H. Tomiyama and H. Yasuura, "Design Technology of Embedded Systems and its Research Trends (in Japanese)," IPSJ Magazine, vol. 40, no. 5, pp. 532-535, May 1999. [Download]

  4. H. Tomiyama, H. Akaboshi, and H. Yasuura, "Evaluation of Compiler Generator for Computer Architecture Evaluation (in Japanese)," Engineering Sciences Reports, Kyushu University, vol. 16, no. 3, pp. 339-344, Dec. 1994.